R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1633

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

• Setup Stage
Notes: 1 In the setup stage, the application analyzes command data from the host requiring processing by
Receive 8-byte command
SETUP token reception
reception complete flag
2 When the transfer direction is control-out, the EP0i transfer request interrupt required in the status
(IFR0/SETUP TS = 1)
Set setup command
to be processed by
the application, and determines the subsequent processing (for example, data stage direction, etc.).
stage should be enabled here. When the transfer direction is control-in, this interrupt is not required
and should be disabled.
To data stage
data in EP0s
application?
Command
USB function
Yes
Figure 36.5 Setup Stage Operation
No
processing by
Interrupt request
this module
Automatic
Clear EP0o FIFO (FCLR/EP0oCLR = 1)
Clear EP0i FIFO (FCLR/EP0iCLR = 1)
Section 36 USB Function Controller (USBF)
To control-in
Rev. 2.00 May 22, 2009 Page 1563 of 1982
Write 1 to EP0s read complete bit
data stage
Determine data stage direction
Read 8-byte data from EP0s
Decode command data
(TRG/EP0s RDFN = 1)
(IFR0/SETUP TS = 0)
Clear SETUP TS flag
Application
*2
To control-out
data stage
REJ09B0256-0200
*1