R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1159

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
27.3.12 Serial Port Register (SCSPTR)
SCSPTR is a 16-bit readable/writable register that controls input/output and data for the port pins
multiplexed with the serial communication interface (SCIF) pins at all times. Input data can be
read from the SCIF_RXD pin, output data written to the SCIF_TXD pin, and breaks in serial
transmission/reception controlled, by means of bits 1 and 0.
All SCSPTR bits except bits 6, 4, 2, and 0 are initialized to 0 by a power-on reset or manual reset;
the value of bits 6, 4, 2, and 0 is undefined. SCSPTR is not initialized in the module standby state.
Note that when reading data via a serial port pin in the SCIF, the peripheral clock value from 2
cycles before is read.
Initial value:
Bit
15 to 8
7
6
R/W:
BIt:
Bit Name
RTSIO
RTSDT
15
R
0
14
R
0
13
R
0
Initial
Value
All 0
0
12
R
0
11
R
0
R/W
R
R/W
R/W
10
R
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Serial Port SCIF_RTS Port Input/Output
Specifies the serial port SCIF_RTS pin input/output
condition. When actually setting the SCIF_RTS pin as a
port output pin to output the value set by the RTSDT bit,
the MCE bit in SCFCR should be cleared to 0.
0: RTSDT bit value is not output to SCIF_RTS pin
1: RTSDT bit value is output to SCIF_RTS pin
Serial Port SCIF_RTS Port Data
Specifies the serial port SCIF_RTS pin input/output
data. Input or output is specified by the RTSIO bit. In
output mode, the RTSDT bit value is output to the
SCIF_RTS pin. The SCIF_RTS pin value is read from
the RTSDT bit regardless of the value of the RTSIO bit.
The initial value of this bit after a power-on reset or
manual reset is undefined.
0: Input/output data is low-level
1: Input/output data is high-level
Section 27 Serial Communication Interface with FIFO (SCIF)
R
9
0
R
8
0
R/W
RTS
IO
7
0
Rev. 2.00 May 22, 2009 Page 1089 of 1982
R/W
RTS
DT
6
R/W
CTS
IO
5
0
R/W
CTS
DT
4
R/W
SCK
IO
3
0
REJ09B0256-0200
R/W
SCK
DT
2
SPB2
R/W
IO
1
0
SPB2
R/W
DT
0

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