R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 736

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 17 Watchdog Timer and Reset (WDT)
17.5.3
The manual reset time (watchdog timer manual reset holding time) by the watchdog timer
overflowed is equal to or more than 3774 clock cycles of the EXTAL pin input clock.
The transition time from watchdog timer overflowed to manual reset state (watchdog timer reset
setup time) is 1 clock cycle of the EXTAL input and thereafter equal to or more than 5 clock
cycles of the peripheral clock (Pck0).
The STATUS [1:0] pins output timing that indicates the reset state or a normal operation is
asynchronous with both the EXTAL pin input clock and the CLKOUT pin input clock because the
STATUS [1:0] pins output timing is synchronous with the peripheral clock (Pck0).
(1)
Rev. 2.00 May 22, 2009 Page 666 of 1982
REJ09B0256-0200
Manual Reset by Watchdog timer Overflowed in Normal Operation
Manual Reset by Watchdog Timer Overflow
Figure 17.8 STATUS Output by Watchdog timer overflow Manual Reset
EXTAL
input
CLKOUT
output
WDT overflow
signal
MRESETOUT
output
STATUS[1:0]
output
WDT reset
stabilization time
during Normal Operation
HH (reset)
Manual reset
holding time
LL (normal)