R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1695

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

37.4
37.4.1
This LCDC is capable of controlling displays with up to 1024 × 1024 dots and 16 bpp (bits per
pixel). The image data for display is stored in VRAM, which is shared with the CPU. This LCDC
should read the data from VRAM before display.
This LSI has a maximum 32-burst memory read operation and a 2.4-Kbyte line buffer, so although
a complete breakdown of the display is unlikely, there may be some problems with the display
depending on the combination. A recommended size at the frame rate of 60 Hz is 320 × 240 dots
in 16 bpp or 640 × 480 dots in 8 bpp.
As a rough standard, the bus occupation ratio shown below should not exceed 40%.
The overhead coefficient becomes 1.375 when the CL2.5 DDR-SDRAM is connected to a 32-bit
data bus.
Bus occupation ratio (%) =
Operation
LCD Module Sizes which can be Displayed in this LCDC
Overhead coefficient x Total number of display pixels ((HDCN + 1) x 8 x (VDLN + 1))
x Frame rate (Hz) x Number of colors (bpp)
CLKOUT (Hz) x Bus width (bit)
Rev. 2.00 May 22, 2009 Page 1625 of 1982
Section 37 LCD Controller (LCDC)
REJ09B0256-0200
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