R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 479

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 11 Local Bus State Controller (LBSC)
11.5.11 Cooperation between Master and Slave
To enable system resources to be controlled in a harmonious fashion by master and slave, their
respective roles must be clearly defined.
When designing an application system that includes this LSI, all control, including initialization,
and low power consumption control, are supposed to be carried out by this LSI.
In a power-on reset, this LSI will not accept bus requests from the slave until the BREQ enable bit
(BCR.BREQEN) is set to 1.
To ensure that the slave processor does not access memory requiring initialization before use,
write 1 to the BREQ enable bit only after this LSI has performed the initialization.
Rev. 2.00 May 22, 2009 Page 409 of 1982
REJ09B0256-0200

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