R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 301

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

When the OCBWB instruction is issued to the L memory area, the physical address bits [28:10]
are generated in accordance with the LDA0 or LDA1 specification. The physical address bits [9:5]
are generated from the virtual address. The physical address bits [4:0] are fixed to 0. Block
transfer is performed from the L memory to the external memory specified by these physical
addresses.
8.4
This LSI implements the following protective functions to the L memory by using the on-chip
memory access mode bit (RMD) and the on-chip memory protection enable bit (RP) in the on-chip
memory control register (RAMCR).
• Protective functions for access from the CPU and FPU
The above descriptions are summarized in table 8.4.
Table 8.4
Note: * Don't care
MMUCR.AT RAMCR.RP SR.MD
0
1
When RAMCR.RMD = 0, and the L memory is accessed in user mode, it is determined to be
an address error exception.
When MMUCR.AT = 1 and RAMCR.RP = 1, MMU exception and address error exception are
checked in the L memory area which is a part of P4 area as with the area P0/P3/U0.
L Memory Protective Functions
Protective Function Exceptions to Access L Memory
*
0
1
0
1
0
1
0
1
RAMCR. RMD
0
1
*
0
1
*
0
1
*
Always Occurring
Exceptions
Address error
exception
—
—
Address error
exception
—
—
Address error
exception
—
—
Rev. 2.00 May 22, 2009 Page 231 of 1982
Possibly Occurring
Exceptions
—
—
—
—
—
—
—
MMU exception
MMU exception
Section 8 L Memory
REJ09B0256-0200