R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 403

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

11.4
The LBSC has 16 registers as shown in table 11.7 and 11.8. The following registers control
memory interfaces, wait cycles, etc.
Table 11.7 Register Configuration
Table 11.8 Register State in Each Operating Made.
Register Name
Memory Address Map Select
Register
Bus Control Register
CS0 Bus Control Register
CS1 Bus Control Register
CS2 Bus Control Register
CS4 Bus Control Register
CS5 Bus Control Register
CS6 Bus Control Register
CS0 Wait Control Register
CS1 Wait Control Register
CS2 Wait Control Register
CS4 Wait Control Register
CS5 Wait Control Register
CS6 Wait Control Register
CS5 PCMCIA Control Register
CS6 PCMCIA Control Register
Register Name
Memory Address Map Select Register MMSELR
Bus Control Register
CS0 Bus Control Register
CS1 Bus Control Register
Register Descriptions
Abbrev.
MMSELR
BCR
CS0BCR
CS1BCR
CS2BCR
CS4BCR
CS5BCR
CS6BCR
CS0WCR
CS1WCR
CS2WCR
CS4WCR
CS5WCR
CS6WCR
CS5PCR
CS6PCR
Abbreviation
BCR
CS0BCR
CS1BCR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
H'0000 0000
H'x000 0000
H'7777 7770
H'7777 7770
H'7777 7770
H'7777 7770
H'7777 7770
H'7777 7770
H'7777 770F
H'7777 770F
H'7777 770F
H'7777 770F
H'7777 770F
H'7777 770F
H'7700 0000
H'7700 0000
Power-On
Reset
H'0000 0000
H'x000 0000
H'7777 7770
H'7777 7770
Section 11 Local Bus State Controller (LBSC)
Rev. 2.00 May 22, 2009 Page 333 of 1982
P4 Address
H'FE60 0020
H'FF80 1000
H'FF80 2000
H'FF80 2010
H'FF80 2020
H'FF80 2040
H'FF80 2050
H'FF80 2060
H'FF80 2008
H'FF80 2018
H'FF80 2028
H'FF80 2048
H'FF80 2058
H'FF80 2068
H'FF80 2070
H'FF80 2080
Manual
Reset
H'0000 0000
H'x000 0000
H'7777 7770
H'7777 7770
Area 7
Address
H'1E60 0020
H'1F80 1000
H'1F80 2000
H'1F80 2010
H'1F80 2020
H'1F80 2040
H'1F80 2050
H'1F80 2060
H'1F80 2008
H'1F80 2018
H'1F80 2028
H'1F80 2048
H'1F80 2058
H'1F80 2068
H'1F80 2070
H'1F80 2080
Sleep
Retained
Retained
Retained
Retained
REJ09B0256-0200
Standby
Retained
Retained
Retained
Retained
Access
Size
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32