R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 2030

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Rev. 2.00 May 22, 2009 Page 1960 of 1982
REJ09B0256-0200
Item
Section 23 Gigabit
Ethernet Controller
(GETHER)
23.3.87 Overflow Alert
FIFO Threshold Register
(FCFTR)
Section 28 Serial
Communication Interface
with FIFO/IrDA Interface
(SCIF/IrDA)
28.3.11 Serial Port
Register (SCSPTR)
28.3.15 IrDA Serial
Mode Register
(SCSMRIR)
Page
935
1147
1152
Amended
Amended
All SCSPTR bits except bits 2 and 0 are initialized to 0 by a
power-on reset or manual reset; the value of bits 2 and 0 is
undefined. SCSPTR is not initialized in the module standby
state.
Amended
Revision (See Manual for Details)
Bit
20 to 16 RFF[4:0]
Bit
15 to 10 
9
Bit Name
Bit Name
EDGEN
Initial
Value
H'17
Description
Reserved
These bits are always read as 0. The write
value should always be 0.
SCIF2_RXD Pin Sampling Mode
0: The SCIF2_RXD pin is sample by an edge
1: The SCIF2_RXD pin is sample by both an
edge and level
Description
Receive FIFO Overflow Alert Signal
Output Threshold
H'00: When one receive frame has
H'01: When two receive frames have
H'16: When 23 receive frames have
H'17: When 24 receive frames have
:
been stored in the receive
FIFO
been stored in the receive
FIFO
been stored in the receive
FIFO
been stored in the receive
FIFO
: