R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 187

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

(4)
• Source: Multiple ITLB address matches
• Transition address: H'A0000000
• Transition operations:
(5)
• Source: Multiple UTLB address matches
• Transition address: H'A0000000
• Transition operations:
The virtual address (32 bits) at which this exception occurred is set in TEA, and the
corresponding virtual page number (22 bits) is set in PTEH [31:10]. ASID in PTEH indicates
the ASID when this exception occurred.
Exception code H'140 is set in EXPEVT, initialization of VBR and SR is performed, and a
branch is made to PC = H'A0000000.
CPU and on-chip peripheral module initialization is performed in the same way as in a manual
reset. For details, see the register descriptions in the relevant sections.
The virtual address (32 bits) at which this exception occurred is set in TEA, and the
corresponding virtual page number (22 bits) is set in PTEH [31:10]. ASID in PTEH indicates
the ASID when this exception occurred.
Exception code H'140 is set in EXPEVT, initialization of VBR and SR is performed, and a
branch is made to PC = H'A0000000.
CPU and on-chip peripheral module initialization is performed in the same way as in a manual
reset. For details, see the register descriptions in the relevant sections.
Instruction TLB Multiple-Hit Exception
Data TLB Multiple-Hit Exception
Rev. 2.00 May 22, 2009 Page 117 of 1982
Section 5 Exception Handling
REJ09B0256-0200