R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 232
R5S77631Y266BGV
Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R5S77631Y266BGV.pdf
(2056 pages)
Specifications of R5S77631Y266BGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 6 Memory Management Unit (MMU)
6.4
6.4.1
This LSI supports the following MMU functions.
1. The MMU decodes the virtual address to be accessed by software, and performs address
2. The MMU determines the cache access status on the basis of the page management
3. If address translation cannot be performed normally in a data access or instruction access, the
4. If address translation information is not recorded in the ITLB in an instruction access, the
6.4.2
Software processing for the MMU consists of the following:
1. Setting of MMU-related registers. Some registers are also partially updated by hardware
2. Recording, deletion, and reading of TLB entries. There are two methods of recording UTLB
3. MMU exception handling. When an MMU exception occurs, processing is performed based on
Rev. 2.00 May 22, 2009 Page 162 of 1982
REJ09B0256-0200
translation by controlling the UTLB/ITLB in accordance with the MMUCR settings.
information read during address translation (C and WT bits).
MMU notifies software by means of an MMU exception.
MMU searches the UTLB. If the necessary address translation information is recorded in the
UTLB, the MMU copies this information into the ITLB in accordance with the LRUI bit
setting in MMUCR.
automatically.
entries: by using the LDTLB instruction, or by writing directly to the memory-mapped UTLB.
ITLB entries can only be recorded by writing directly to the memory-mapped ITLB. Deleting
or reading UTLB/ITLB entries is enabled by accessing the memory-mapped UTLB/ITLB.
information set by hardware.
MMU Functions
MMU Hardware Management
MMU Software Management
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