R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1341

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

In addition, the only D7 to D0 bits are inverted by the SINV bit. The O/E bit in SCSMR is set to
odd parity mode to invert the parity bit. In transmission and reception, the setting condition is
similar.
30.4.4
Only the internal clock generated by the on-chip baud rate generator can be used as the
transmit/receive clock in the smart card interface. The bit rate is set using the bit rate register
(SCBRR) and the sampling register (SCSMPL), using the formula indicated below. Examples of
bit rates are listed in table 30.5
Here, when the CKE0 bit is set to 1 and the clock output is selected, a clock signal is output from
the SIM_CLK pin with frequency equal to (SCSMPL + 1) times the bit rate.
For the inverse-convention type, the logical level 1 is assigned to the A state, and the logical
level 0 to the Z state, and transmission and reception are performed in MSB-first. The data of
the start character shown in figure 30.3 is then H'3F. Even parity is used according to the smart
card specification, and so the parity bit is 0 corresponding to the Z state.
where
B = Bit rate (bits/s)
Pck0 = Peripheral clock0
S = SCSMPL setting (0 ≤ S ≤ 2047)
N = SCBRR setting (0 ≤ N ≤ 7).
B = Pck0 × 10
Clocks
(Z)
(Z)
Figure 30.3 Examples of Start Character Waveforms
(a) Direct converntion (SDIR = SINV = O/E = 0)
(b) Inverse convention (SDIR = SINV = O/E = 1)
6
/{(S+1) × 2 (N+1)}
Ds
Ds
A
A
D7
D0 D1
Z
Z
D6
Z
Z
D5
D2
A
A
D4
D3
Z
A
D3
D4
Z
A
D2
D5
Z
A
D1
D6
A
A
Rev. 2.00 May 22, 2009 Page 1271 of 1982
D0
D7
A
A
Dp
Dp
Z (Z)
Z (Z)
Section 30 SIM Card Module (SIM)
state
state
REJ09B0256-0200