R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1674

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 37 LCD Controller (LCDC)
37.3.7
LDLAOR sets the address width of the Y-coordinates increment used for LCDC to read the image
recognized by the graphics driver. This register specifies how many bytes the address from which
data is to be read should be moved when the Y coordinates have been incremented by 1. This
register does not have to be equal to the horizontal width of the LCD panel. When the memory
address of a point (X, Y) in the two-dimensional image is calculated by Ax + By+ C, this register
becomes equal to B in this equation.
Rev. 2.00 May 22, 2009 Page 1604 of 1982
REJ09B0256-0200
Initial value:
Bit
15 to 0
R/W:
Bit:
LCDC Line Address Offset Register for Display Data Fetch (LDLAOR)
R/W
Bit Name Initial Value
LAO
[15:0]
15
0
R/W
14
0
R/W
H'0280
13
0
R/W
12
0
R/W
11
0
R/W
R/W
R/W
10
0
R/W
Description
Line Address Offset
The minimum alignment unit of LDLAOR is 16 bytes.
Because the LCDC handles these values as 16-byte
data, the values written to the lower four bits of the
register are always treated as 0. The lower four bits of
the register are always read as 0. The initial values (×
resolution = 640) will continuously and accurately
place the VGA (640 × 480 dots) display data without
skipping an address between lines. For details, see
table 37.5.
A binary exponential at least as large as the horizontal
width of the image is recommended for the LDLAOR
value, taking into consideration the software operation
speed. When the hardware rotation function is used,
the LDLAOR value should be a binary exponential (in
this example, 256) at least as large as the horizontal
width of the image (after rotation, it becomes 240 in a
240 × 320 panel) instead of the horizontal width of the
LCD panel (320 in a 320 × 240 panel).
9
1
R/W
LAO[15:0]
8
0
R/W
7
1
R/W
0
6
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0

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