R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 931

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

23.3.40 Qtag Addition/Deletion Set Register (Port 0 to 1) (TSU_QTAG0)
TSU_QTAG0 sets the functions adding Qtag to the normal Ethernet frames (no Qtag) to convert
them into IEEE802.1Q frames (with Qtag) and deleting Qtag from IEEE802.1Q frames (with
Qtag) to convert them into normal Ethernet frames (no Qtag) during port 0 to 1 relay operations.
This register must not be written to once after relay operations have been enabled (after the
FWEN0 bit in TSU_FWEN0 or the FWEN1 bit in TSU_FWEN1 is set to 1).
Bit
31 to 3
2 to 0
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Bit Name

QTAG0[2:0]
31
15


R
R
0
0
30
14


R
R
0
0
29
13


R
R
0
0
Initial
Value
All 0
All 0
28
12


R
R
0
0
27
11


R
R
0
0
R/W
R
R/W
26
10


R
R
0
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
These bits set Qtag adding and deleting functions
during port 0 to 1 relay operations.
H'0: Disables Qtag adding and deleting functions
H'1: Disables Qtag adding and deleting functions
H'2: Deletes Qtag from frames with Qtag
H'3: Adds Qtag to frames with no Qtag
H'4: Disables Qtag adding and deleting functions
H'5: Setting prohibited
H'6: Setting prohibited
H'7: Adds Qtag to frames with no Qtag
This register must not be written to once after relay
operations have been enabled (after the FWEN0 bit in
TSU_FWEN0 or the FWEN1 bit in TSU_FWEN1 is set
to 1).
25

R

R
0
9
0
(Does not add Qtag to MAC control frames)
(Adds Qtag to MAC control frames)
24

R

R
0
8
0
Section 23 Gigabit Ethernet Controller (GETHER)
23


R
R
0
7
0
Rev. 2.00 May 22, 2009 Page 861 of 1982
22


R
R
0
6
0
21


R
R
0
5
0
20

R

R
0
4
0
19


R
R
0
3
0
REJ09B0256-0200
R/W
18

R
0
2
0
QTAG0[2:0]
17

R
0
1
0
R/W
16

R
0
0
0