R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1388

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 31 Multimedia Card Interface (MMCIF)
31.3.14 Transfer Clock Control Register (CLKON)
CLKON controls the transfer clock frequency and clock ON/OFF.
Bits CSEL[3:0] must be set to 0001 for the peripheral clock of 33.3 MHz in order to achieve a
16.7-Mbps transfer clock in the MMCIF. At this time, use a sufficiently slow clock for transfer in
open-drain type output in MMC mode.
In a command sequence, do not perform clock ON/OFF or frequency modification.
Rev. 2.00 May 22, 2009 Page 1318 of 1982
REJ09B0256-0200
Bit
7
6 to 4
3 to 0
Bit Name
CLKON
—
CSEL[3:0]
Initial value:
Initial
Value
0
All 0
0000
R/W:
Bit:
CLKON
R/W
7
0
R/W
R/W
R
R/W
—
R
6
0
Description
Clock On
0: Fixes the transfer clock output from the MMC_CLK
1: Outputs the transfer clock from the MMC_CLK pin.
Reserved
These bits are always read as 0. The write value should
always be 0.
Transfer Clock Frequency Select
1001 to 1111: Setting prohibited
0000: Setting prohibited
0001: Uses the 1/2-divided system clock as a transfer clock.
0010: Uses the 1/4-divided system clock as a transfer clock.
0011: Uses the 1/8-divided system clock as a transfer clock.
0100: Uses the 1/16-divided system clock as a transfer clock.
0101: Uses the 1/32-divided system clock as a transfer clock.
0110: Uses the 1/64-divided system clock as a transfer clock.
0111: Uses the 1/128-divided system clock as a transfer clock.
1000: Uses the 1/256-divided system clock as a transfer clock.
—
R
5
0
pin to low level.
—
R
4
0
R/W
3
0
R/W
2
CSEL[3:0]
0
R/W
1
0
R/W
0
0