R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1602

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 36 USB Function Controller (USBF)
36.3.21 EP3 Data Register (EPDR3)
EPDR3 is an 8-byte transmit FIFO buffer for endpoint 3. EPDR4 holds one packet of transmit data
for the interrupt transfer of endpoint 3. Transmit data is fixed by writing one packet of data and
setting EP3PKTE in the trigger register. When an ACK handshake is returned from the host after
the data has been transmitted, EP3TS in interrupt flag register 1 is set. This FIFO buffer can be
initialized by means of EP3CLR in the FCLR0 register.
Rev. 2.00 May 22, 2009 Page 1532 of 1982
REJ09B0256-0200
Bit
31 to 8 
7 to 0
Initial value:
Initial value:
R/W:
R/W:
Bit: 31
Bit: 15
Bit Name
D[7:0]
—
—
—
—
R
R
30
—
14
—
—
—
R
R
29
—
13
—
—
—
R
R
Initial Value R/W Description
Undefined
Undefined
28
—
12
—
—
—
R
R
27
—
11
—
—
—
R
R
26
—
10
—
—
—
R
R
R
W
25
—
—
—
—
R
R
9
Data register for endpoint 3 transfer
Reserved
These bits are always read as undefined value.
Write value should always be 0.
24
—
—
—
—
R
R
8
23
—
—
—
W
R
7
22
—
—
—
W
R
6
21
—
—
—
W
R
5
20
—
—
—
W
R
4
D[7:0]
19
—
—
—
W
R
3
18
—
—
—
W
R
2
17
—
—
—
W
R
1
—
16
—
—
W
R
0