R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1025

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

a different receive buffer specified by a different receive descriptor. Thus, one receive frame can
be stored in multiple receive buffers.
Figure 23.6 shows the relationship between the receive descriptors and receive buffers.
0 0
0 0
0 0
0 0
0 0
1 0
1 0
1 1
Transmit descriptor 1
Transmit descriptor 2
Transmit descriptor 3
Transmit descriptor 4
Transmit descriptor 5
Transmit descriptor 6
Transmit descriptor 7
Transmit descriptor 8
(Transmit frame C)
(Transmit frame D)
(Waiting for a receive frame)
(Waiting for a receive frame)
(Waiting for a receive frame)
(Transmit frame A)
(Transmit frame B)
(Transmit frame B)
Receive descriptor ring
(in memory)
1
1
0
1
1
-
-
-
1
0
1
1
1
-
-
-
Figure 23.6 Relationship between Receive Descriptor and Receive Buffer
RACT
RDL
RFP[1:0]
boundary
boundary
boundary
boundary
boundary
boundary
boundary
boundary
boundary
boundary
boundary
boundary
boundary
boundary
boundary
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
32-bytes
Receive buffer
(in memory)
Padding data
(Latter 35 bytes)
Receive frame A
(Former 32 bytes)
(Former 32 bytes)
32 bytes of
unused area
Receive frame B
Receive frame B
(Former 29 bytes)
Receive frame D
Receive frame D
(Underfined value)
(29 bytes)
(53 bytes)
Padding data
Receive frame C
4 bytes
Section 23 Gigabit Ethernet Controller (GETHER)
Receive frame B
This frame is divided into two descriptor and
stored
Receive frame C
When padding data is inserted at the top of
the receive frame. the receive frame can be
written to arbitrary byte boundary in memory.
Receive frame D
When padding data is inserted in the middle
of the receive frame, PRADIR should be set
so that the latter half of data is written from
to the 4-bytes boundary in the receive buffer.
Receive frame A
When the receive frame ;ength is not a multiple
of 32 bytes, an undefined value is written.
29 bytes
63 bytes
53 bytes
64 bytes
Receive frame data
(A frame input from the GMII/MII/RMIi is
written to the receive FIFO. Then the frame
is transferred by DMA transfer from the
receive FIFO to the receive buffer in memory.)
Rev. 2.00 May 22, 2009 Page 955 of 1982
REJ09B0256-0200