R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1275

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

29.3.8
SISTR is a 16-bit readable/writable register that shows the SIOF state. Each bit in this register
becomes an SIOF interrupt source when the corresponding bit in SIIER is set to 1.
Initial value:
Bit
15
14
13
R/W:
BIt:
Status Register (SISTR)
Bit Name
—
TCRDY
TFEMP
15
—
R
0
TCRDY
14
R
0
TFEMP
13
R
0
Initial
Value
0
0
0
TDREQ
12
R
0
R/W
R
R
R
11
—
R
0
RCRDY
10
R
0
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Transmit Control Data Ready
0: Indicates that a write to SITCR is disabled
1: Indicates that a write to SITCR is enabled
•
•
•
•
Transmit FIFO Empty
0: Indicates that transmit FIFO is not empty
1: Indicates that transmit FIFO is empty
•
•
•
RFFUL
R
9
0
If SITCR is written when this bit is cleared to 0,
SITCR is over-written and the previous contents of
SITCR are not output from the SIOF_TXD pin.
This bit is valid when the TXE bit in SITCR is set to
1.
This bit indicates a state of the SIOF. If SITCR is
written, the SIOF clears this bit.
If the issue of interrupts by this bit is enabled, an
SIOF interrupt is issued.
This bit is valid when the TXE bit in SICTR is 1.
This bit indicates a state; if SITDR is written, the
SIOF clears this bit.
If the issue of interrupts by this bit is enabled, an
SIOF interrupt is issued.
RDREQ
R
8
0
—
R
7
0
Rev. 2.00 May 22, 2009 Page 1205 of 1982
—
R
6
0
Section 29 Serial I/O with FIFO (SIOF)
SAERR
R/W
5
0
FSERR
R/W
4
0
TFOVF
R/W
3
0
REJ09B0256-0200
TFUDF
R/W
2
0
RFUDF
R/W
1
0
RFOVF
R/W
0
0