R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 134

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 3 Instruction Set
3.3
Table 3.3 shows the notation used in the SH instruction lists shown in tables 3.4 to 3.13.
Table 3.3
Rev. 2.00 May 22, 2009 Page 64 of 1982
REJ09B0256-0200
Item
Instruction
mnemonic
Operation
notation
Instruction code
Instruction Set
Notation Used in Instruction List
Format
OP.Sz SRC, DEST
MSB ↔ LSB
Description
OP:
Sz:
SRC:
DEST:
Rm:
Rn:
imm:
disp:
→, ←
(xx)
M/Q/T
&
|
∧
~
<<n, >>n n-bit shift
mmmm: Register number (Rm, FRm)
nnnn:
0000:
0001:
1111:
mmm:
nnn:
000:
001:
111:
mm:
nn:
00:
01:
10:
11:
iiii:
dddd:
:
:
Operation code
Size
Source operand
Source and/or destination operand
Source register
Destination register
Immediate data
Displacement
Transfer direction
Memory operand
SR flag bits
Logical AND of individual bits
Logical OR of individual bits
Logical exclusive-OR of individual bits
Logical NOT of individual bits
Register number (Rn, FRn)
R0, FR0
R1, FR1
R15, FR15
Register number (DRm, XDm, Rm_BANK)
Register number (FVm)
Register number (FVn)
FV0
FV4
FV8
FV12
Immediate data
Displacement
Register number (DRn, XDn, Rn_BANK)
DR0, XD0, R0_BANK
DR2, XD2, R1_BANK
DR14, XD14, R7_BANK