R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 79

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Item
Multimedia card
interface (MMCIF)
Serial sound
interface (SSI)
Debug interface
USB host interface
(OHCI USBH)
USB function
interface Version
1.1 (USBF)
Audio codec
interface (HAC)
I
(IIC)
2
C bus interface
Features
Supports MMC mode
A maximum bit rate of 16.7 Mbps at 33 MHz of peripheral clock 1
Interface is through the CLK output pin for transfer clock output, CMD I/O
pin for command output/response input, DAT I/O pin for data input/output
Four interrupt sources
Four channels (SSI0, SSI1, SSI2, SSI3)
Supports various serial audio formats
Supports master/slave functions
Programmable word clock and bit clock generation
Multi-channel format
Supports 8/16/18/20/22/24/32-bit data formats
H-UDI (User Debugging Interface)
AUD (Advanced User Debugger)
Data transfer rates of 1.5 Mbps and 12 Mbps
OHCI version 1.0
Includes a USB device controller (UDC) supporting USB1.1
 Automatic processing of standard USB commands (some commands
Transfer rate: Full speed (12 Mbps only)
Digital interface for audio codec (single channel)
Supports transmission/reception for slot 1 to slot 4
Choice of 16- or 20-bit DMA transfer in transmission/reception
Supports various sampling rates by adjusting slot data
Generates data ready, data request, overflow, and underflow interrupts
Supports the I
Two channels (IIC0, IIC1)
Master/slave functions
Multi-master function
A maximum transfer rate of 400 Kbps
Programmable clock generation from the system clock
are not included: Get Descriptor/Class/Vector commands are
processed on the microcomputer’s firmware)
2
C bus interface protocol
Rev. 2.00 May 22, 2009 Page 9 of 1982
Section 1 Overview
REJ09B0256-0200

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