R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 20

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

18.4 Sleep Mode ........................................................................................................................ 680
18.5 Software Standby Mode..................................................................................................... 681
18.6 Module Standby Mode....................................................................................................... 682
18.7 DDR-SDRAM Power Supply Backup............................................................................... 683
18.8 RTC Power Supply Backup ............................................................................................... 686
18.9 STATUS Pin Signal Change Timing ................................................................................. 687
Section 19 Timer Unit (TMU)........................................................................... 689
19.1 Features.............................................................................................................................. 689
19.2 Input/Output Pins............................................................................................................... 691
19.3 Register Descriptions......................................................................................................... 692
19.4 Operation ........................................................................................................................... 701
19.5 Interrupts............................................................................................................................ 706
19.6 Usage Notes ....................................................................................................................... 707
Rev. 2.00 May 22, 2009 Page xviii of lxviii
18.3.1 Standby Control Register (STBCR)...................................................................... 673
18.3.2 Module Stop Register 0 (MSTPCR0) ................................................................... 674
18.3.3 Module Stop Register 1 (MSTPCR1) ................................................................... 675
18.4.1 Transition to Sleep Mode...................................................................................... 680
18.4.2 Canceling Sleep Mode .......................................................................................... 680
18.5.1 Transition to Software Standby Mode .................................................................. 681
18.5.2 Canceling Software Standby Mode ...................................................................... 681
18.6.1 Transition to Module Standby Mode .................................................................... 682
18.6.2 Canceling Module Standby Mode ........................................................................ 682
18.7.1 Control of Self-Refresh and Initialization............................................................. 683
18.7.2 DDR-SDRAM Backup Sequence when Turning Off System Power Supply ....... 684
18.8.1 Transition to RTC Power Supply Backup Mode .................................................. 686
18.8.2 Canceling RTC Power Supply Backup Mode....................................................... 686
18.9.1 Timing at Reset..................................................................................................... 687
18.9.2 Timing at Sleep Mode Cancellation ..................................................................... 687
19.3.1 Timer Output Control Register (TOCR)............................................................... 694
19.3.2 Timer Start Register (TSTR) ................................................................................ 695
19.3.3 Timer Constant Register (TCORn) (n = 0 to 5) .................................................... 697
19.3.4 Timer Counter (TCNTn) (n = 0 to 5).................................................................... 697
19.3.5 Timer Control Registers (TCRn) (n = 0 to 5) ....................................................... 698
19.3.6 Input Capture Register 2 (TCPR2) ....................................................................... 700
19.4.1 Counter Operation ................................................................................................ 701
19.4.2 Input Capture Function ......................................................................................... 705
19.6.1 Register Writes ..................................................................................................... 707
19.6.2 Reading from TCNT............................................................................................. 707
19.6.3 External Clock Frequency .................................................................................... 707