R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 797

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

20.3.5
The TSR registers are 16-bit registers that indicate the status of each channel. The TPU has four
TSR registers, one for each channel. The TSR registers are initialized to H'0000 by a reset, but not
initialized in standby mode, sleep mode or module standby mode.
Bit
15 to 8 
7
6
5
Initial value:
R/W:
Bit:
Bit Name
TCFD

TCFU
Timer Status Registers (TSR)
15
R
0
14
R
0
Initial
Value R/W
All 0
0
0
0
13
R
0
12
R
0
R
R
R
R/(W)* Underflow Flag
11
R
0
Description
Reserved
These bits are always read as 0 and cannot be modified.
Count Direction Flag
Status flag that shows the direction in which TCNT counts in
phase counting mode of channels 2, and 3.
In channels 0 and 1, bit 7 is reserved. It is always read as 0
and cannot be modified.
0: TCNT counts down
1: TCNT counts up
Reserved
This bit is always read as 0 and cannot be modified.
Status flag that indicates that TCNT underflow has occurred
when channels 2, and 3 are set to phase counting mode.
In channels 0 and 1, bit 5 is reserved. It is always read as 0
and cannot be modified.
[Clearing condition] (Initial value)
When 0 is written to TCFU after reading TCFU = 1
[Setting condition]
When the TCNT value underflows (changes from H'0000 to
H'FFFF)
10
R
0
9
R
0
8
R
0
TCFD
7
R
0
Rev. 2.00 May 22, 2009 Page 727 of 1982
Section 20 16-Bit Timer Pulse Unit (TPU)
6
R
0
R/(W)*R/(W)*R/(W)*R/(W)*R/(W)*R/(W)*
TCFU TCFV TGFD TGFC TGFB TGFA
5
0
4
0
3
0
REJ09B0256-0200
2
0
1
0
0
0