R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1500

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 34 Serial Sound Interface (SSI)
Rev. 2.00 May 22, 2009 Page 1430 of 1982
REJ09B0256-0200
Bit
10
9
Bit Name
SDTA
PDTA
Initial
Value
0
0
R/W
R/W
R/W
Description
Serial Data Alignment
0: Serial data is transmitted/ received first, followed by
1: Padding bits are transmitted/ received first, followed
Parallel Data Alignment
When the data word length is 32, 16 or 8 bit, this
configuration field has no meaning.
This bit applies to SSIRDR in receive mode and
SSITDR in transmit mode.
0: Parallel data (SSITDR, SSIRDR) is left-aligned
1: Parallel data (SSITDR, SSIRDR) is right-aligned.
•
All data bits in SSIRDR or SSITDR are used on the
audio serial bus. Four data words are transmitted or
received at each 32-bit access. The first data word is
derived from bits 7 to 0, the second from bits 15 to 8,
the third from bits 23 to 16 and the last data word is
derived from bits 31 to 24.
•
All data bits in SSIRDR or SSITDR are used on the
audio serial bus. Two data words are transmitted or
received at each 32-bit access. The first data word is
derived from bits 15 to 0 and the second data word is
derived from bits 31 to 16.
padding bits.
by serial data.
DWL = 000 (with a data word length of 8 bits), the
PDTA setting is ignored.
DWL = 001 (with a data word length of 16 bits), the
PDTA setting is ignored.