R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1463

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 33 Audio Codec Interface (HAC)
Section 33 Audio Codec Interface (HAC)
The HAC, the audio codec digital controller interface, supports bidirectional data transfer
compliant with Audio Codec 97 (AC'97) Version 2.1. The HAC provides serial transmission to
/reception from the AC97 codec. Each channel of the HAC can be connected to a single audio
codec device.
The HAC carries out data extraction from/insertion into audio frames. For data slots within both
receive and transmit frames, the PIO transfer by the CPU or the DMA transfer by the DMAC can
be used.
33.1
Features
The HAC has the following features:
• Supports Digital interface to a single AC'97 version 2.1 Audio Codec
• PIO transfer of status slots 1 and 2 in Rx frames
• PIO transfer of command slots 1 and 2 in Tx frames
• PIO transfer of data slots 3 and 4 in Rx frames
• PIO transfer of data slots 3 and 4 in Tx frames
• Selectable 16-bit or 20-bit DMA transfer of data slots 3 and 4 in Rx frames
• Selectable 16-bit or 20-bit DMA transfer of data slots 3 and 4 in Tx frames
• Accommodates various sampling rates by qualifying slot data with tag bits and monitoring the
Tx frame request bits of Rx frames
• Generates data ready, data request, overrun and underrun interrupts
• Supports cold reset, warm reset, and power-down mode
Rev. 2.00 May 22, 2009 Page 1393 of 1982
REJ09B0256-0200

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