R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 356

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 9 Interrupt Controller (INTC)
INT2B4: Indicates detailed interrupt sources for the PCIC.
INT2B5: Indicates detailed interrupt sources for the MMCIF.
Rev. 2.00 May 22, 2009 Page 286 of 1982
REJ09B0256-0200
Module
PCIC
Module
MMCIF
Bit
31 to 10 —
9
8
7
6
5
4
3
2
1
0
Bit
31 to 4
3
2
1
0
Source
PWD0
PWD1
PWD2
PWD3
ERR
INTD
INTC
INTB
INTA
SERR
Source
—
FRDY
ERR
TRAN
FSTAT
Function
These bits are always read as 0. The
write value should always be 0.
FIFO ready interrupt
CRC error interrupt, data timeout
error interrupt, or command timeout
error interrupt
Data response interrupt, data transfer
end interrupt, command response
receive end interrupt, command
transmit end interrupt, or data busy
end interrupt
MMC FIFO empty interrupt or FIFO
full interrupt
Function
These bits are always read as 0. The
write value should always be 0.
PCIC power state D0 state interrupt
PCIC power state D1 state interrupt
PCIC power state D2 state interrupt
PCIC power state D3 state interrupt
PCIC error interrupt
PCIC INTD interrupt
PCIC INTC interrupt
PCIC INTB interrupt
PCIC INTA interrupt
PCIC SERR interrupt
Description
Description
Indicates MMC interrupt
sources. This register
indicates MMC interrupt
sources even if mask
setting is made in the
interrupt mask register
for them.
Indicates PCIC interrupt
sources. This register
indicates the PCIC
interrupt sources even if
mask setting is made in
the interrupt mask
register for them.