R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1655

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

36.10.4 Assigning EP0 Interrupt Sources
The EP0 interrupt sources assigned to IFR0 (bits 0, 1, and 2) must be assigned to the same
interrupt pins by ISR0. The other interrupt sources have no restrictions.
36.10.5 FIFO Clear when DMA Transfer is Set
When the DMA transfer is enabled in endpoint 1, the data register cannot be cleared. Cancel the
DMA transfer before clearing the data register.
36.10.6 Note on Using TR Interrupt
The bulk-in transfer has a transfer request interrupt (TR interrupt). The following points should be
noted when using a TR interrupt.
When the IN token is sent from the USB host and there is no data in the corresponding EP FIFO,
the TR interrupt flag is set. However, the TR interrupt is generated continuously at the timing as
shown in figure 36.20. In this case, note that erroneous operation should not occur.
Note: When the IN token is received and there is no data in the corresponding EP FIFO, an NAK
is determined. However, the TR interrupt flag is set after an NAK handshake is
transmitted. Therefore when the next IN token is received before TRG/PKTE is written,
the TR interrupt flag is set again.
Section 36 USB Function Controller (USBF)
Rev. 2.00 May 22, 2009 Page 1585 of 1982
REJ09B0256-0200