R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 860

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 23 Gigabit Ethernet Controller (GETHER)
Rev. 2.00 May 22, 2009 Page 790 of 1982
REJ09B0256-0200
Name
RMII
management
data I/O
Link status
Wake-On-LAN
PHY interrupt
GMII transmit
clock
RMII carrier
detection
RMII receive
error
RMII receive
data
RMII receive
data
RMII transmit
enable
RMII transmit
data
RMII transmit
data
RMII carrier
detection (mirror
pin)
RMII receive
error (mirror pin)
RMII receive
data (mirror pin)
RMII receive
data (mirror pin)
RMII transmit
enable (mirror
pin)
1
Port
Abbreviation
RMII1_MDIO
ET1_LINKSTA
ET1_WOL
ET1_PHY-INT
GET1_GTX-CLK
RMII1_CRS_DV
RMII1_RX_ER
RMII1_RXD0
RMII1_RXD1
RMII1_TXD_EN
RMII1_TXD0
RMII1_TXD1
RMII1M_CRS_DV Input
RMII1M_RX_ER
RMII1M_RXD0
RMII1M_RXD1
RMII1M_TXD_EN Output
Input
I/O
Output
Input
Output
Input
Input
Input
Input
Output
Output
Output
Input
Input
I/O
Input
Bidirectional signal for exchange of
Signal indicating reception of Magic
Transmit signal timing reference signal in
Function
management information between STA
and PHY in RMII mode
Inputs link status from PHY-LSI
Packet
Interrupt signal from PHY
GMII mode
Carrier detection signal in RMII mode
Identifies error state occurred during data
reception in RMII mode
2-bit receive data in RMII mode
2-bit receive data in RMII mode
Indicates that transmit data is ready on
RMII1_TXD0 and RMII1_TXD1 in RMII
mode
2-bit transmit data in RMII mode
2-bit transmit data in RMII mode
Carrier detection signal in RMII mode
(mirror pin)
Identifies error state occurred during data
reception in RMII mode (mirror pin)
2-bit receive data in RMII mode (mirror
pin)
2-bit receive data in RMII mode (mirror
pin)
Indicates that transmit data is ready on
RMII1_TXD0 and RMII1_TXD1 in RMII
mode (mirror pin)