LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1087

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 1017.CAN status register (STAT, address 0x400E 2004) bit description
Table 1018.CAN error counter (EC, address 0x400E 2008) bit description
<Document ID>
User manual
Bit
4
5
6
7
31:8
Bit
7:0
14:8
15
31:16 -
Symbol
TEC_7_0
REC_6_0
RP
Symbol
RXOK
EPASS
EWARN
BOFF
-
42.10.6.1.3 CAN error counter
…continued
Value
1
0
-
Value
1
0
1
0
1
0
1
0
-
A status interrupt is generated by bits BOFF, EWARN, RXOK, TXOK, or LEC. BOFF and
EWARN generate an error interrupt, and RXOK, TXOK, and LEC generate a status
change interrupt if EIE and SIE respectively are set to enabled in the CANCTRL register.
A change of bit EPASS and a write to RXOK, TXOK, or LEC will never create a status
interrupt.
Reading the CANSTAT register will clear the Status Interrupt value in the CANIR register.
Description
Received a message successfully
This bit is reset by the CPU. It is never reset by the CAN controller.
Since this bit was last set to zero by the CPU, a message has been
successfully received independent of the result of acceptance filtering.
Since this bit was last reset by the CPU, no message has been
successfully transmitted.
Error passive
The CAN controller is in the error passive state as defined in the CAN
2.0 specification .
The CAN controller is in the error active state.
Warning status
At least one of the error counters in the EML has reached the error
warning limit of 96.
Both error counters are below the error warning limit of 96.
Busoff status
The CAN controller is in busoff state.
The CAN module is not in busoff.
reserved
Description
Transmit error counter
Current value of the transmit error counter (maximum value 127)
Receive error counter
Current value of the receive error counter (maximum value 255).
Receive error passive
The receive counter has reached the error passive level as defined in the
CAN2.0 specification .
The receive counter is below the error passive level.
Reserved
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 42: Appendix
UM10430
Reset
value
0
0
0
0
© NXP B.V. 2011. All rights reserved.
Reset
value
0
0
0
-
1087 of 1164
Access
R/W
RO
RO
RO
Access
RO
RO
RO
-