LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 957

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LPC1837FET256,551

Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1837FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293795551
NXP Semiconductors
42.2 LPC1850/30/20/10 Rev ‘-’ Event router
<Document ID>
User manual
42.2.1 How to read this chapter
42.2.2 Basic configuration
42.2.3 General description
Remark: The event router controls various event inputs to the NVIC and the wake-up
process.
The available event router sources vary for different parts.
Table 901. Event router clocking and power control
The event router is used to process wake-up events such as certain interrupts and
external or internal inputs for wake-up from any of the low power modes (Sleep,
Deep-sleep, Power-down, and Deep power-down modes). The event router has multiple
event inputs from various peripherals. When the proper edge detection is set in the EDGE
configuration register, the event router can wake up the part or can raise an interrupt in the
NVIC.
Each event input to the event router can be configured to trigger an output signal on rising
or falling edges or on HIGH or LOW levels. The event router combines all events to an
output signal which is used as follows:
Remark: The ATIMER, RTC, BOD, WDT, CAN and QEI events are routed through the
event router and have no direct connection to the NVIC. When proper edge detection in
the Event router is set for the peripheral events, the event router can generate an interrupt
in the NVIC.
Clock to event router
Ethernet: available on LPC1850/30.
USB0: available on LPC1850/30/20.
USB1: available on LPC1850/30.
Create an interrupt if the event router interrupt is enabled in the NVIC.
Send a wake-up signal to the power management unit to wake up from Deep-sleep,
Power-down, and Deep power-down modes.
Send a wake-up signal to CCU1 and CCU2 for waking up from Sleep mode (see
Section
14.5.3).
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Base clock
BASE_M3_CLK
Branch clock
CLK_M3_BUS 150 MHz
Chapter 42: Appendix
UM10430
Maximum
frequency
© NXP B.V. 2011. All rights reserved.
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