LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 902

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 829. A/D Control register (CR - address 0x400E 3000 (ADC0) and 0x400E 4000 (ADC1)) bit description
<Document ID>
User manual
Bit
16
19:17 CLKS
20
21
23:22 -
26:24 START
Symbol
BURST
-
PDN
Value
0
1
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
-
0
1
-
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
Description
Burst mode
Conversions are software controlled and require 11 clocks.
The AD converter does repeated conversions at the rate selected by the CLKS
field, scanning (if necessary) through the pins selected by 1s in the SEL field.
The first conversion after the start corresponds to the least-significant 1 in the
SEL field, then higher numbered 1 bits (pins) if applicable. Repeated
conversions can be terminated by clearing this bit, but the conversion that’s in
progress when this bit is cleared will be completed.
Important: START bits must be 000 when BURST = 1 or conversions will not
start.
This field selects the number of clocks used for each conversion in Burst
mode, and the number of bits of accuracy of the result in the LS bits of ADDR,
between 11 clocks (10 bits) and 4 clocks (3 bits).
11 clocks / 10 bits
10 clocks / 9 bits
9 clocks / 8 bits
8 clocks / 7 bits
7 clocks / 6 bits
6 clocks / 5 bits
5 clocks / 4 bits
4 clocks / 3 bits
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
Power mode
The A/D converter is in Power-down mode.
The A/D converter is operational.
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
When the BURST bit is 0, these bits control whether and when an A/D
conversion is started:
No start (this value should be used when clearing PDN to 0).
Start conversion now.
Start conversion when the edge selected by bit 27 occurs on CTOUT_15
(combined timer output 15, ADC start0).
Start conversion when the edge selected by bit 27 occurs on CTOUT_8
(combined timer output 8, ADC start1).
Start conversion when the edge selected by bit 27 occurs on ADCTRIG0 input
(ADC start3).
Start conversion when the edge selected by bit 27 occurs on ADCTRIG1 input
(ADC start4).
Start conversion when the edge selected by bit 27 occurs on Motocon PWM
output MCOA2 (ADC start5).
Reserved.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 38: LPC18xx 10-bit ADC0/1
UM10430
© NXP B.V. 2011. All rights reserved.
902 of 1164
Reset
value
0
000
-
0
-
0