LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1119

no-image

LPC1837FET256,551

Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1837FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293795551
43.1 Abbreviations
<Document ID>
User manual
Table 1049.Abbreviations
Acronym
ADC
AES
AHB
APB
API
BOD
CAN
CMAC
CSMA/CD
DAC
DC-DC
DMA
GPIO
IRC
IrDA
JTAG
LCD
LSB
MAC
MCU
MIIM
n.c.
OHCI
OTG
PHY
PLL
PMC
PWM
RIT
RMII
SDRAM
SIMD
SPI
SSI
SSP
TCP/IP
UM10430
Chapter 43: Supplementary information
Rev. 00.13 — 20 July 2011
All information provided in this document is subject to legal disclaimers.
Analog-to-Digital Converter
Advanced Encryption Standard
Advanced Peripheral Bus
Application Programming Interface
BrownOut Detection
Cipher-based Message Authentication Code
General Purpose Input/Output
Media Access Control
Open Host Controller Interface
On-The-Go
Power Mode Control
Reduced Media Independent Interface
Synchronous Dynamic Random Access Memory
Single Instruction Multiple Data
Serial Synchronous Interface
Description
Advanced High-performance Bus
Controller Area Network
Carrier Sense Multiple Access with Collision Detection
Digital-to-Analog Converter
Direct Current-to-Direct Current
Direct Memory Access
Internal RC
Infrared Data Association
Joint Test Action Group
Liquid Crystal Display
Least Significant Bit
MicroController Unit
Media Independent Interface Management
not connected
Physical Layer
Phase-Locked Loop
Pulse Width Modulator
Repetitive Interrupt Timer
Serial Peripheral Interface
Synchronous Serial Port
Transmission Control Protocol/Internet Protocol
Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
User manual
1119 of 1164

Related parts for LPC1837FET256,551