LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 221

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
Table 133. GIMA inputs
Input
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
36:33
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
Source
T0 MAT0 or CTOUT 0
T0 MAT2 or CTOUT_2
T0 MAT3 or CTOUT 3
T1 MAT2 or CTOUT 6
T1 MAT3 or CTOUT 7
T2 MAT0 or CTOUT 8
T2 MAT3 or CTOUT 11
T3 MAT2 or CTOUT 14
T3 MAT3 or CTOUT 15
U0 TXD
U0 RXD
U2 TXD
U2 RXD
U3 TXD
U3 RXD
<tbd>I2S0_RX_MWS
<tbd>I2S0_TX_MWS
SOF0
SOF1
Reserved
<tbd>I2S1_RX_MWS
<tbd>I2S1_TX_MWS
pin T0_CAP0
pin T0_CAP1
pin T0_CAP2
pin T0_CAP3
pin T1_CAP0
pin T1_CAP1
pin T1_CAP2
pin T1_CAP3
pin T2_CAP0
pin T2_CAP1
pin T2_CAP2
pin T2_CAP3
pin T3_CAP0
pin T3_CAP1
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 14: LPC18xx Global Input Multiplexer Array (GIMA)
Possible connections to peripheral blocks
VADC
Event router
channel 13
T1 CAP3
Event router
channel 14
T2 CAP3
VADC
T3 CAP3
Event router
channel 16
T0 CAP3
T1 CAP1
T1 CAP2
T0 CAP1
T2 CAP2
T3 CAP1
T3 CAP2
T3 CAP0
T3 CAP1
T3 CAP2
T3 CAP3
T2 CAP1
T2 CAP2
T0 CAP0
T0 CAP1
T0 CAP2
T0 CAP3
T1 CAP0
T1 CAP1
T1 CAP2
T1 CAP3
T2 CAP0
T2 CAP1
T2 CAP2
T2 CAP3
T3 CAP0
T3 CAP1
ADC start
conversion
(START = 0x3)
ADC start
conversion
(START = 0x2)
SCT CAP3
SCT CAP4
T2 CAP1
SCT CAP5
SCT CAP6
SCT CAP7
SCT CAP6
SCT CAP6
SCT CAP7
SCT CAP7
SCT CAP3
SCT CAP3
SCT CAP1
SCT CAP4
SCT CAP4
UM10430
© NXP B.V. 2011. All rights reserved.
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