LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 888

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
37.10.6.2 Data transfer after loss of arbitration
37.10.6.3 Forced access to the I
Arbitration may be lost in the master transmitter and master receiver modes (see
Figure
0x78, and 0xB0 (see
If the STA flag in CON is set by the routines which service these states, then, if the bus is
free again, a START condition (state 0x08) is transmitted without intervention by the CPU,
and a retry of the total serial transfer can commence.
In some applications, it may be possible for an uncontrolled source to cause a bus
hang-up. In such situations, the problem may be caused by interference, temporary
interruption of the bus or a temporary short-circuit between SDA and SCL.
If an uncontrolled source generates a superfluous START or masks a STOP condition,
then the I
obtained within a reasonable amount of time, then a forced access to the I
possible. This is achieved by setting the STO flag while the STA flag is still set. No STOP
condition is transmitted. The I
and is able to transmit a START condition. The STO flag is cleared by hardware (see
Figure
08H
Fig 144. Simultaneous Repeated START conditions from two masters
Fig 145. Forced access to a busy I
S
138). Loss of arbitration is indicated by the following states in STAT; 0x38, 0x68,
145).
SLA
2
STO flag
SDA line
C-bus stays busy indefinitely. If the STA flag is set and bus access is not
STA flag
SCL line
W
All information provided in this document is subject to legal disclaimers.
18H
A
Figure 140
Rev. 00.13 — 20 July 2011
DATA
2
C-bus
2
C hardware behaves as if a STOP condition was received
time limit
repeated START earlier
and
other Master sends
28H
2
A
C-bus
Figure
S
141).
OTHER MASTER
Chapter 37: LPC18xx I2C-bus interface
CONTINUES
condition
start
retry
08H
P
UM10430
© NXP B.V. 2011. All rights reserved.
S
2
C-bus is
SLA
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