LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 931

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LPC1837FET256,551

Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1837FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293795551
NXP Semiconductors
40.11 Flash signature generation
Table 872. Register overview: FMC (base address 0x4008 4000)
<Document ID>
User manual
Name
FMSSTART
FMSSTOP
FMSW0
FMSW1
FMSW2
FMSW3
FMSTAT
FMSTATCLR
40.11.1 Register description for signature generation
Signature start address register
Signature stop-address register
Description
128-bit signature Word 0
128-bit signature Word 1
128-bit signature Word 2
128-bit signature Word 3
Signature generation status register
Signature generation status clear register
The flash module contains a built-in signature generator. This generator can produce a
128-bit signature from a range of flash memory. A typical usage is to verify the flashed
contents against a calculated signature (e.g. during programming).
The address range for generating a signature must be aligned on flash-word boundaries,
i.e. 128-bit boundaries. Once started, signature generation completes independently.
While signature generation is in progress, the flash memory cannot be accessed for other
purposes, and an attempted read will cause a wait state to be asserted until signature
generation is complete. Code outside of the flash (e.g. internal RAM) can be executed
during signature generation. This can include interrupt services, if the interrupt vector
table is re-mapped to memory other than the flash memory. The code that initiates
signature generation should also be placed outside of the flash memory.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Access
R/W
R/W
R
R
R
R
R
W
Chapter 40: LPC18xx flash programming interface
Reset
Value
0
0
-
-
-
-
0
-
Address
0x4008 4020
0x4008 4024
0x4008 402C
0x4008 4030
0x4008 4034
0x4008 4038
0x4008 4FE0
0x4008 4FE8
UM10430
© NXP B.V. 2011. All rights reserved.
Reference
Table 873
Table 874
Table 875
Table 876
Table 877
Table 878
Section 40.11.1.3
Section 40.11.1.4
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