LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 575

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 491. Buffer to pixel mapping for 64 x 64 pixel cursor format
<Document ID>
User manual
Data bits
31:30
29:28
27:26
25:24
23:22
21:20
19:18
17:16
15:14
13:12
11:10
9:8
7:6
(12, 0)
(13, 0)
(14, 0)
(15, 0)
(10, 0)
(11, 0)
(8, 0)
(9, 0)
(4, 0)
(5, 0)
(6, 0)
(7, 0)
(0, 0)
0
(28, 0)
(29, 0)
(30, 0)
(31, 0)
(24, 0)
(25, 0)
(26, 0)
(27, 0)
(20, 0)
(21, 0)
(22, 0)
(23, 0)
(16, 0)
Table 490
Table 490. Buffer to pixel mapping for 32 x 32 pixel cursor format
64 by 64 pixel format
Only one cursor fits in the memory space in 64 x 64 mode.
cursor format.
Data bits
31:30
29:28
27:26
25:24
23:22
21:20
19:18
17:16
15:14
13:12
11:10
9:8
7:6
5:4
3:2
1:0
4
(44, 0)
(45, 0)
(46, 0)
(47, 0)
(40, 0)
(41, 0)
(42, 0)
(43, 0)
(36, 0)
(37, 0)
(38, 0)
(39, 0)
(32, 0)
shows the buffer to pixel mapping for Cursor 0.
8
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(12, 0)
(13, 0)
(14, 0)
(15, 0)
(10, 0)
(11, 0)
(6, 0)
(7, 0)
(0, 0)
(1, 0)
(2, 0)
(3, 0)
(8, 0)
(9, 0)
(4, 0)
(5, 0)
0
(60, 0)
(61, 0)
(62, 0)
(63, 0)
(56, 0)
(57, 0)
(58, 0)
(59, 0)
(52, 0)
(53, 0)
(54, 0)
(55, 0)
(48, 0)
12
Rev. 00.13 — 20 July 2011
Offset into cursor memory
(28, 0)
(29, 0)
(30, 0)
(31, 0)
(24, 0)
(25, 0)
(26, 0)
(27, 0)
(20, 0)
(21, 0)
(22, 0)
(23, 0)
(16, 0)
(17, 0)
(18, 0)
(19, 0)
(16 * y)
(12, y)
(13, y)
(14, y)
(15, y)
(10, y)
(11, y)
(8, y)
(9, y)
(4, y)
(5, y)
(6, y)
(7, y)
(0, y)
4
Offset into cursor memory
(16 * y) +4
(12, y)
(13, y)
(14, y)
(15, y)
(10, y)
(8 * y)
(11, y)
(28, y)
(29, y)
(30, y)
(31, y)
(24, y)
(25, y)
(26, y)
(27, y)
(20, y)
(21, y)
(22, y)
(23, y)
(16, y)
(8, y)
(9, y)
(4, y)
(5, y)
(6, y)
(7, y)
(0, y)
(1, y)
(2, y)
(3, y)
(16 * y) + 8
(8 * y) +4
(28, y)
(29, y)
(30, y)
(31, y)
(24, y)
(25, y)
(26, y)
(27, y)
(20, y)
(21, y)
(22, y)
(23, y)
(16, y)
(17, y)
(18, y)
(19, y)
(44, y)
(45, y)
(46, y)
(47, y)
(40, y)
(41, y)
(42, y)
(43, y)
(36, y)
(37, y)
(38, y)
(39, y)
(32, y)
Table 491
Chapter 23: LPC18xx LCD
(16 * y) + 12
(12, 31)
(13, 31)
(14, 31)
(15, 31)
(10, 31)
(11, 31)
(8, 31)
(9, 31)
(4, 31)
(5, 31)
(6, 31)
(7, 31)
(0, 31)
(1, 31)
(2, 31)
(3, 31)
(60, y)
(61, y)
(62, y)
(63, y)
(56, y)
(57, y)
(58, y)
(59, y)
(52, y)
(53, y)
(54, y)
(55, y)
(48, y)
F8
shows the 64 x 64
UM10430
© NXP B.V. 2011. All rights reserved.
(29, 31)
(30, 31)
(31, 31)
(24, 31)
(25, 31)
(26, 31)
(27, 31)
(20, 31)
(21, 31)
(22, 31)
(23, 31)
(16, 31)
(17, 31)
(18, 31)
(19, 31)
(28,31)
575 of 1164
(60, 63)
(61, 63)
(62, 63)
(63, 63)
(56, 63)
(57, 63)
(58, 63)
(59, 63)
(52, 63)
(53, 63)
(54, 63)
(55, 63)
(48, 63)
FC
FC