LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 97

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
Non-integer mode
In this mode the post-divider is enabled and the feedback divider is set to run directly on
the CCO clock, which gives the following frequency dividers:
Direct mode
In this mode, the post-divider is disabled and the CCO clock is sent directly to the output,
leading to the following frequency equation:
Power-down mode
In this mode, the internal current reference will be turned off, the oscillator and the
phase-frequency detector will be stopped and the dividers will enter a reset state. While in
Power-down mode, the lock output will be low, to indicate that the PLL is not in lock. When
the Power-down mode is terminated, the PLL will resume its normal operation and will
make the lock signal high once it has regained lock on the input clock.
All information provided in this document is subject to legal disclaimers.
FCCO
Rev. 00.13 — 20 July 2011
FCLKOUT
FCLKOUT
=
2

P
FCLKOUT
FCCO

FCLKOUT
Chapter 9: LPC18xx Clock Generation Unit (CGU)
=
=
FCCO
---------------- -
2
FCCO
=

P
M
=

=
M
FCLKIN
--------------------- -
=
=
------------
2

2
M
M

N
FCLKIN
----------------------

P

P

FCLKIN
--------------------- -
N

FCLKIN
----------------------
M
N
N

FCLKIN
--------------------- -
N
UM10430
© NXP B.V. 2011. All rights reserved.
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