LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 348

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
19.9 Low-power operation
<Document ID>
User manual
19.8.4.2 Read buffers
Write buffer operation:
The write buffers are flushed whenever:
Note: For dynamic memory, the smallest buffer flush is a quadword of data. For static
memory, the smallest buffer flush is a byte of data.
Read buffers are used to:
Read buffer operation:
A buffer filled by performing a read from memory is marked as not-dirty (not containing
write data) and its contents are not flushed back to the memory controller unless a
subsequent AHB transfer performs a write that hits the buffer.
In many systems, the contents of the memory system have to be maintained during
low-power sleep modes. The EMC provides a mechanism to place the dynamic memories
into self-refresh mode.
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Convert all dynamic memory write transactions into quadword bursts on the external
memory interface. This enhances transfer efficiency for dynamic memory.
Reduce external memory traffic. This improves memory bandwidth and reduces
power consumption.
If the buffers are enabled, an AHB write operation writes into the Least Recently Used
(LRU) buffer, if empty.
If the LRU buffer is not empty, the contents of the buffer are flushed to memory to
make space for the AHB write data.
If a buffer contains write data it is marked as dirty, and its contents are written to
memory before the buffer can be reallocated.
The memory controller state machine is not busy performing accesses to external
memory.
The memory controller state machine is not busy performing accesses to external
memory, and an AHB interface is writing to a different buffer.
Buffer read requests from memory. Future read requests that hit the buffer read the
data from the buffer rather than memory, reducing transaction latency.
Convert all read transactions into quadword bursts on the external memory interface.
This enhances transfer efficiency for dynamic memory.
Reduce external memory traffic. This improves memory bandwidth and reduces
power consumption.
If the buffers are enabled and the read data is contained in one of the buffers, the read
data is provided directly from the buffer.
If the read data is not contained in a buffer, the LRU buffer is selected. If the buffer is
dirty (contains write data), the write data is flushed to memory. When an empty buffer
is available the read command is posted to the memory.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 19: LPC18xx External Memory Controller (EMC)
UM10430
© NXP B.V. 2011. All rights reserved.
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