LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 416

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
20.10.4.1.1 Operational model
20.10.4.1 Suspend
20.10.4.2 Resume
20.10.4 Suspend/resume
In some applications, it may not be possible to enable one or more pipes while in FS
mode. Beyond the data rate issue, there is no difference in DCD operation between FS
and HS modes.
In order to conserve power, USB devices automatically enter the suspended state when
the device has observed no bus traffic for a specified period. When suspended, the USB
device maintains any internal status, including its address and configuration. Attached
devices must be prepared to suspend at any time they are powered, regardless of if they
have been assigned a non-default address, are configured, or neither Bus activity may
cease due to the host entering a suspend mode of its own. In addition, a USB device shall
also enter the suspended state when the hub port it is attached to is disabled.
A USB device exits suspend mode when there is bus activity. A USB device may also
request the host to exit suspend mode or selective suspend by using electrical signaling to
indicate remote wake-up. The ability of a device to signal remote wake-up is optional. If
the USB device is capable of remote wake-up signaling, the device must support the
ability of the host to enable and disable this capability. When the device is reset, remote
wake-up signaling must be disabled.
The device controller moves into the suspend state when suspend signaling is detected or
activity is missing on the upstream port for more than a specific period. After the device
controller enters the suspend state, the DCD is notified by an interrupt (assuming DC
Suspend Interrupt is enabled). When the DCSuspend bit in the PORTSCx is set to a ‘1’,
the device controller is suspended.
DCD response when the device controller is suspended is application specific and may
involve switching to low power operation. Information on the bus power limits in suspend
state can be found in USB 2.0 specification.
If the device controller is suspended, its operation is resumed when any non-idle signaling
is received on its upstream facing port. In addition, the device can signal the system to
resume operation by forcing resume signaling to the upstream port. Resume signaling is
sent upstream by writing a ‘1’ to the Resume bit in the in the PORTSCx while the device is
in suspend state. Sending resume signal to an upstream port should cause the host to
issue resume signaling and bring the suspended bus segment (one more devices) back to
the active condition.
Remark: Before resume signaling can be used, the host must enable it by using the Set
Feature command defined in device framework (chapter 9) of the USB 2.0 Specification.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 20: LPC18xx USB0 Host/Device/OTG controller
UM10430
© NXP B.V. 2011. All rights reserved.
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