LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 112

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
Table 89.
Reset output
generator
CORE_RST
PERIPH_RST
MASTER_RST
Reserved
WWDT_RST
CREG_RST
Reserved
BUS_RST
SCU_RST
Reserved
M3_RST
Reserved
Reserved
LCD_RST
USB0_RST
USB1_RST
DMA_RST
SDIO_RST
EMC_RST
ETHERNET_RST
AES_RST
Reserved
GPIO_RST
Reserved
TIMER0_RST
TIMER1_RST
TIMER2_RST
TIMER3_RST
RITIMER_RST
SCT_RST
MOTOCONPWM_RST 38
QEI_RST
Reset output configuration
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Reset
output
#
0
1
2
3
4
5
6 - 7
8
9
10 - 12
13
14
15
16
17
18
19
20
21
22
23
24 - 27
28
29 - 31
32
33
34
35
36
37
39
Reset source
external reset,
BOD reset,
WWDT time-out
reset
CORE_RST
PERIPH_RST
-
CORE_RST
CORE_RST
-
PERIPH_RST
PERIPH_RST
-
MASTER_RST
-
-
MASTER_RST
MASTER_RST
MASTER_RST
MASTER_RST
MASTER_RST
MASTER_RST
MASTER_RST
MASTER_RST
-
PERIPH_RST
-
PERIPH_RST
PERIPH_RST
PERIPH_RST
PERIPH_RST
PERIPH_RST
PERIPH_RST
PERIPH_RST
PERIPH_RST
Chapter 11: LPC18xx Reset Generation Unit (RGU)
Parts of the device reset when
activated
Entire chip including peripherals in the
battery-powered domain: CGU, power
management controller, general purpose
registers, alarm timer, parts of the CREG
block, and RTC.
All peripherals with reset source
PERIPH_RST and MASTER_RST
All peripherals with reset source
MASTER_RST
-
WWDT. No software reset.
Configuration register block, Event router,
backup registers, RTC, alarm timer. No
software reset.
-
Buses; RGU, CCU, and CGU registers;
memory controllers; bus bridges. Do not
use during normal operation.
System control unit
-
Cortex-M3 system reset
-
-
LCD controller reset
USB0 reset
USB1 reset
DMA reset
SDIO reset
External memory controller reset
Ethernet reset
AES reset
-
GPIO reset
-
Timer0 reset
Timer1 reset
Timer2 reset
Timer3 reset
Repetitive Interrupt timer reset
State Configurable Timer reset
Motor control PWM reset
QEI reset
UM10430
© NXP B.V. 2011. All rights reserved.
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