LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 560

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
23.6.20 Cursor XY Position register
23.6.21 Cursor Clip Position register
Table 474. Cursor Palette register 1 (CRSR_PAL1, address 0x4000 8C0C) bit description
The CRSR_XY register defines the distance of the top-left edge of the cursor from the
top-left side of the cursor overlay. Refer to the section on Cursor Clipping for more details.
If the FrameSync bit in the CRSR_CFG register is 0, the cursor position changes
immediately, even if the cursor is currently being scanned. If Framesync is 1, the cursor
position is only changed during the next vertical frame blanking period.
The contents of the CRSR_XY register are described in
Table 475. Cursor XY Position register (CRSR_XY, address 0x4000 8C10) bit description
The CRSR_CLIP register defines the distance from the top-left edge of the cursor image,
to the first displayed pixel in the cursor image.
Different synchronization rules apply to the Cursor Clip registers than apply to the cursor
coordinates. If the FrameSync bit in the CRSR_CFG register is 0, the cursor clip point is
changed immediately, even if the cursor is currently being scanned.
If the Framesync bit in the CRSR_CFG register is 1, the displayed cursor image is only
changed during the vertical frame blanking period, providing that the cursor position has
been updated since the Clip register was programmed. When programming, the Clip
register must be written before the Position register (ClcdCrsrXY) to ensure that in a given
frame, the clip and position information is coherent.
The contents of the CRSR_CLIP register are described in
Bits
7:0
15:8
23:16
31:24
Bits
9:0
15:10
25:16
31:26
Function
RED
GREEN
BLUE
-
Function
CRSRX
-
CRSRY
-
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Description
Red color component
Green color component
Blue color component.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Description
X ordinate of the cursor origin measured in pixels.
When 0, the left edge of the cursor is at the left of the display.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Y ordinate of the cursor origin measured in pixels.
When 0, the top edge of the cursor is at the top of the display.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Table
Table
Chapter 23: LPC18xx LCD
475.
476.
UM10430
© NXP B.V. 2011. All rights reserved.
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0x0
0x0
Reset
value
0x0
-
Reset
value
0x0
-
0x0
-