LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 990

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
42.4.6.6 Integer divider register B, C, D
Table 939. IDIVA control register (IDIVA_CTRL, address 0x4005 0034) bit description
Table 940. IDIVB/C/D control registers (IDIVB_CTRL, address 0x4005 0038; IDIVC_CTRL,
Bit
3:2
10:4
11
23:12
27:24
31:28
Bit
0
1
5:2
10:6
Symbol
IDIV[1:0]
-
AUTOBLOCK
-
CLK_SEL
-
Symbol
PD
-
IDIV[3:0]
-
address 0x4005 003C; IDIVC_CTRL, address 0x4005 0040) bit description
…continued
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Value Description
0x0
0x1
0x2
0x3
0
1
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
Value
0
1
1))
1 (default)
2
3
4
Reserved
Block clock automatically during frequency
change
Autoblocking disabled
Autoblocking enabled
Reserved
Clock-source selection.
32 kHz oscillator
IRC (default)
ENET_RX_CLK
ENET_TX_CLK
GP_CLKIN
Reserved
Crystal oscillator
PLL0
PLL1
Reserved
Integer divider A divider values (1/(IDIV +
Description
Integer divider power down
IDIV enabled (default)
power-down
Reserved
Integer divider B, C, D divider values
(1/(IDIV + 1))
Reserved
0000 = 1 (default)
0001 = 2
...
1111 = 16
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
00
-
0
-
0x01
-
Reset
value
0
-
0000
-
990 of 1164
Access
R/W
-
R/W
-
Access
R/W
-
R/W
-
R/W
-