LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 59

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LPC1837FET256,551

Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1837FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293795551
NXP Semiconductors
<Document ID>
User manual
Table 35.
Bit
17:16
19:18
21:20
23:22
25:24
27:26
29:28
Symbol
DMAMUXCH8
DMAMUXCH9
DMAMUXCH10
DMAMUXCH11
DMAMUXCH12
DMAMUXCH13
DMAMUXCH14
DMA muxing register (DMAMUX, address 0x4004 311C) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Value
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
Description
Select DMA to peripheral connection for
DMA peripheral 8.
Timer 3 match 1
USART3 receive
SCT match output 1
Reserved
Select DMA to peripheral connection for
DMA peripheral 9.
SSP0 receive
I2S0 channel 0
SCT match output 1
Reserved
Select DMA to peripheral connection for
DMA peripheral 10.
SSP0 transmit
I2S0 channel 1
SCT match output 0
Reserved
Selects DMA to peripheral connection for
DMA peripheral 11.
SSP1 receive
Reserved
USART0 transmit
Reserved
Select DMA to peripheral connection for
DMA peripheral 12.
SSP1 transmit
Reserved
USART0 receive
Reserved
Select DMA to peripheral connection for
DMA peripheral 13.
ADC0
AES input
SSP1 receive
USART3 receive
Select DMA to peripheral connection for
DMA peripheral 14.
ADC1
AES output
SSP1 transmit
USART3 transmit
Chapter 7: LPC18xx Configuration Registers (CREG)
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0
0
0
0
0
0
0
…continued
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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