LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 590

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 499. Register overview: State Configurable Timer (base address 0x4000 0000)
<Document ID>
User manual
Name
CONFIG
CTRL
CTRL_L
CTRL_H
LIMIT
LIMIT_L
LIMIT_H
HALT
HALT_L
HALT_H
STOP
STOP_L
STOP_H
START
START_L
START_H
-
COUNT
COUNT_L
COUNT_H
STATE
STATE_L
STATE_H
INPUT
REGMODE
REGMODE_L
REGMODE_O
OUTPUT
OUTPUTDIRCTRL
RES
DMAREQ0
DMAREQ1
-
EVEN
EVFLAG
CONEN
CONFLAG
Access Address
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
-
R/W
R/W
R/W
R/W
R/W
R/W
– REGMODEn = 0: Registers operate as capture and capture control registers.
offset
0x000
0x004
0x004
0x006
0x008
0x008
0x00A
0x00C
0x00C
0x00E
0x010
0x010
0x012
0x014
0x014
0x016
0x018 -
0x03C
0x040
0x040
0x042
0x044
0x044
0x046
0x048
0x04C
0x04C
0x050
0x054
0x058
0x05C
0x060
0x064 -
0x0EC
0x0F0
0x0F4
0x0F8
0x0FC
0x04E
All information provided in this document is subject to legal disclaimers.
Description
SCT configuration register
SCT control register
SCT control register low counter 16-bit
SCT control register high counter 16-bit
SCT limit register
SCT limit register low counter 16-bit
SCT limit register high counter 16-bit
SCT halt condition register
SCT halt condition register low counter 16-bit
SCT halt condition register high counter 16-bit
SCT stop condition register
SCT stop condition register low counter 16-bit
SCT stop condition register high counter 16-bit
SCT start condition register
SCT start condition register low counter 16-bit
SCT start condition register high counter 16-bit
Reserved
SCT counter register
SCT counter register low counter 16-bit
SCT counter register high counter 16-bit
SCT state register
SCT state register low counter 16-bit
SCT state register high counter 16-bit
SCT input register
SCT match/capture registers mode register
SCT match/capture registers mode register low counter 16-bit
SCT match/capture registers mode register high counter 16-bit
SCT output register
SCT output counter direction control register
SCT conflict resolution register
SCT DMA request 0 register
SCT DMA request 1 register
Reserved
SCT event enable register
SCT event flag register
SCT conflict enable register
SCT conflict flag register
Rev. 00.13 — 20 July 2011
Chapter 24: LPC18xx State Configurable Timer (SCT)
UM10430
© NXP B.V. 2011. All rights reserved.
Reset value
0x0000 7E00
0x0004 0004
0x0004 0004
0x0004 0004
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
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