LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 656

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 568. MCPWM Count Control read address (CNTCON - 0x400A 005C) bit description
<Document ID>
User manual
Bit
10
11
12
13
14
15
16
17
28:18 -
29
30
31
Symbol
TC1MCI2_RE
TC1MCI2_FE
TC2MCI0_RE
TC2MCI0_FE
TC2MCI1_RE
TC2MCI1_FE
TC2MCI2_RE
TC2MCI2_FE
CNTR0
CNTR1
CNTR2
26.7.10.2 MCPWM Count Control set address
Writing one(s) to this write-only address sets the corresponding bit(s) in CNTCON.
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
-
0
1
0
1
0
1
Counter 1 rising edge mode, channel 2.
A rising edge on MCI2 does not affect counter 1.
If MODE1 is 1, counter 1 advances on a rising edge on MCI2.
Counter 1 falling edge mode, channel 2.
A falling edge on MCI2 does not affect counter 1.
If MODE1 is 1, counter 1 advances on a falling edge on MCI2.
Counter 2 rising edge mode, channel 0.
A rising edge on MCI0 does not affect counter 2.
If MODE2 is 1, counter 2 advances on a rising edge on MCI0.
Counter 2 falling edge mode, channel 0.
A falling edge on MCI0 does not affect counter 2.
If MODE2 is 1, counter 2 advances on a falling edge on MCI0.
Counter 2 rising edge mode, channel 1.
A rising edge on MCI1 does not affect counter 2.
If MODE2 is 1, counter 2 advances on a rising edge on MCI1.
Counter 2 falling edge mode, channel 1.
A falling edge on MCI1 does not affect counter 2.
If MODE2 is 1, counter 2 advances on a falling edge on MCI1.
Counter 2 rising edge mode, channel 2.
A rising edge on MCI2 does not affect counter 2.
If MODE2 is 1, counter 2 advances on a rising edge on MCI2.
Counter 2 falling edge mode, channel 2.
A falling edge on MCI2 does not affect counter 2.
If MODE2 is 1, counter 2 advances on a falling edge on MCI2.
Reserved.
Channel 0 counter/timer mode.
Channel 0 is in timer mode.
Channel 0 is in counter mode.
Channel 1 counter/timer mode.
Channel 1 is in timer mode.
Channel 1 is in counter mode.
Channel 2 counter/timer mode.
Channel 2 is in timer mode.
Channel 2 is in counter mode.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 26: LPC18xx Motor Control PWM (MOTOCONPWM)
UM10430
© NXP B.V. 2011. All rights reserved.
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Reset
value
0
0
0
0
0
0
0
0
-
0
0
0