LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 753

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 698: UART1 Line Control Register (LCR - address 0x4008 200C) bit description
Table 699: UART1 Modem Control Register (MCR - address 0x4008 2010) bit description
<Document ID>
User manual
Bit
1:0
2
3
5:4
6
7
31:8
Bit
0
1
3:2
Symbol
WLS
SBS
PE
PS
BC
DLAB
-
Symbol
DTRCTRL
RTSCTRL
-
33.5.8 UART1 Modem Control Register
Value Description
-
-
The U1MCR enables the modem loopback mode and controls the modem output signals.
Value Description
0
1
0
1
00
01
10
11
0
1
0
1
0x0
0x1
0x2
0x3
DTR Control.
Source for modem output pin, DTR. This bit reads as 0 when modem loopback mode
is active.
RTSControl.
Source for modem output pin RTS. This bit reads as 0 when modem loopback mode is
active.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Word Length Select.
5-bit character length.
6-bit character length.
7-bit character length.
8-bit character length.
Stop Bit Select.
1 stop bit.
2 stop bits (1.5 if U1LCR[1:0]=00).
Parity Enable.
Disable parity generation and checking.
Enable parity generation and checking.
Parity Select.
Odd parity. Number of 1s in the transmitted character and the attached
parity bit will be odd.
Even Parity. Number of 1s in the transmitted character and the attached
parity bit will be even.
Forced "1" stick parity.
Forced "0" stick parity.
Break Control.
Disable break transmission.
Enable break transmission. Output pin UART1 TXD is forced to logic 0
when U1LCR[6] is active high.
Divisor Latch Access Bit (DLAB)
Disable access to Divisor Latches.
Enable access to Divisor Latches.
Reserved, user software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 33: LPC18xx UART1
UM10430
© NXP B.V. 2011. All rights reserved.
Reset value
0
0
0
0
0
0
NA
753 of 1164
Reset
value
0
0
0