LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 41
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LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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NXP Semiconductors
6.4 Event router inputs
6.5 Pin description
<Document ID>
User manual
Table 16.
Table 17.
Event # Source
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
25-21
Pin
WAKEUP0/1/2/3
WAKEUP0
WAKEUP1
WAKEUP2
WAKEUP3
Alarm timer
RTC
BOD trip level 1
WWDT
Ethernet
USB0
USB1
SD/MMC
C_CAN0/1
GIMA output 25
GIMA output 26
QEI
GIMA output 27
-
-
Reset
BOD trip level 2
-
Event router inputs
Event router pin description
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Direction
I
Notes
WAKEUP0 pin
WAKEUP1 pin
WAKEUP2 pin
WAKEUP3 pin
Alarm timer interrupt
RTC interrupt
BOD interrupt; wake-up from low power mode
WWDT interrupt
Wake-up packet indicator
Wake-up request signal
ahb_needclk signal
SD/MMC interrupt
ORed C_CAN0 and C_CAN1 interrupt
Output 2 of the combined timer (ORed output of SCT
output 2 and the match channel 2 of timer 0). See
Table
Output 6 of the combined timer (ORed output of SCT
output 6 and the match channel 2 of timer 1). See
Table
QEI interrupt
Output 14 of the combined timer (ORed output of SCT
output 14 and the match channel 2 of timer 3). See
Table
Reserved
Reserved
<tbd>
<tbd>
Reserved
Description
External wake-up input; can raise an interrupt and can
cause wake-up from any of the low power modes.
134.
134.
134.
Chapter 6: LPC18xx Event router
UM10430
© NXP B.V. 2011. All rights reserved.
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