LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 495

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 419. MAC IEEE1588 time stamp control register (MAC_TIMESTP_CTRL, address 0x4001 0700) bit description
<Document ID>
User manual
Bit
9
10
11
12
13
14
15
17:16
18
31:19
Symbol
TSCTRL
SSR
TSVER2
ENA
TSIPENA Enable Time Stamp Snapshot for PTP over Ethernet frames
TSIPV6E
NA
TSIPV4E
NA
TSEVNT
ENA
TSMSTR
ENA
TSCLKT
YPE
TSENMA
CADDR
Description
Time Stamp Digital or Binary rollover control
When set, the Time Stamp Low register rolls over after 0x3B9A_C9FF value (i.e., 1
nanosecond accuracy) and increments the Time Stamp (High) seconds. When reset,
the rollover value of sub-second register is 0x7FFF_FFFF. The sub-second increment
has to be programmed correctly depending on the PTP reference clock frequency
and this bit value.
Enable PTP packet snooping for version 2 format
When set, the PTP packets are snooped using the 1588 version 2 format else
snooped using the version 1 format.
When set, the time stamp snapshot is taken for frames which have PTP messages in
Ethernet frames (PTP over Ethernet) also. By default snapshots are taken for
UDP-IP-Ethernet PTP packets.
Enable Time Stamp Snapshot for IPv6 frames
When set, the time stamp snapshot is taken for IPv6 frames.
Enable Time Stamp Snapshot for IPv4 frames
When set, the time stamp snapshot is taken for IPv4 frames.
Enable Time Stamp Snapshot for Event Messages
When set, the time stamp snapshot is taken for event messages only . When reset
snapshot is taken for all other messages except Announce, Management and
Signaling.
Enable Snapshot for Messages Relevant to Master
When set, the snapshot is taken for messages relevant to master node only else
snapshot is taken for messages relevant to slave node. This is valid only for ordinary
clock and boundary clock node.
Select the type of clock node
The following are the options to select the type of clock node:
00 = ordinary clock
01 = boundary clock
10 = end-to-end transparent clock
11 = peer-to-peer transparent clock
Enable MAC address for PTP frame filtering
When set, uses the DA MAC address (that matches any MAC Address register
except the default MAC address 0) to filter the PTP frames when PTP is sent directly
over Ethernet.
Table 420
enable master and enable snapshot for event message register settings.
Table 420. Time stamp snapshot dependency on register bits
TSCLKTYPE TSMSTRENA TSEVNTENA
00 or 01
00 or 01
00 or 01
10
indicates the messages, for which a snapshot is taken depending on the clock,
x
1
0
N/A
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
0
1
1
0
Messages for which snapshot is taken
SYNC, Follow_Up, Delay_Req, Delay_Resp
Delay_req
SYNC
SYNC, Follow_Up, Delay_Req, Delay_Resp
Chapter 22: LPC18xx Ethernet
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0
0
0
0
1
0
0
00
0
495 of 1164
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W