LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1137

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 760. Message interface registers. . . . . . . . . . . . . .819
Table 761. Structure of a message object in the message
Table 762. CAN message interface command request
Table 763. CAN message interface command request
Table 764. CAN message interface command mask
Table 765. CAN message interface command mask
Table 766. CAN message interface command mask
Table 767. CAN message interface command mask
Table 768. CAN message interface command mask 1
Table 769. CAN message interface command mask 1
Table 770. CAN message interface command mask 2
Table 771. CAN message interface command mask 2
Table 772. CAN message interface command arbitration 1
Table 773. CAN message interface command arbitration 1
Table 774. CAN message interface command arbitration 2
Table 775. CAN message interface command arbitration 2
<Document ID>
User manual
RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .819
registers (IF1_CMDREQ, address 0x400E 2020
(C_CAN0) and 0x400A 4020 (C_CAN1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .820
registers (IF2_CMDREQ, address 0x400E 2080
(C_CAN0) and 0x400A 4080 (C_CAN1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .820
registers write direction (IF1_CMDMSK, address
0x400E 2024 (C_CAN0) and 0x400A 4024
(C_CAN1)) bit description . . . . . . . . . . . . . . .821
registers write direction (IF2_CMDMSK, address
0x400E 2084 (C_CAN0) and 0x400A 4080
(C_CAN1)) bit description . . . . . . . . . . . . . . .822
registers read direction (IF1_CMDMSK, address
0x400E 2024 (C_CAN0) and 0x400A 4024
(C_CAN1)) bit description. . . . . . . . . . . . . . . .823
registers read direction (IF2_CMDMSK, address
0x400E 2084 (C_CAN0) and 0x400A 4024
(C_CAN1)) bit description. . . . . . . . . . . . . . . .824
registers (IF1_MSK1, address 0x400E 2028
(C_CAN0) and 0x400A 4028 (C_CAN1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .825
registers (IF2_MSK1, address 0x400E 2088
(C_CAN0) and 0x400A 4028 (C_CAN1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .825
registers (IF1_MSK2, address 0x400E 202C
(C_CAN0) and 0x400A 402C (C_CAN1)) bit
description
registers (IF2_MSK2, 0x400E 208C (C_CAN0)
and 0x400A 402C (C_CAN1)) bit description
registers (IF1_ARB1, address 0x400E 2030
(C_CAN0) and 0x400A 4030 (C_CAN1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .827
registers (IF2_ARB1, address 0x400E 2090
(C_CAN0) and 0x400A 4090 (C_CAN1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .827
registers (IF1_ARB2, address 0x400E 2034
(C_CAN0) and 0x400A 4034 (C_CAN1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .827
registers (IF2_ARB2, address 0x400E 2094
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .826
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .826
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Table 776. CAN message interface message control
Table 777. CAN message interface message control
Table 778. CAN message interface data A1 registers
Table 779. CAN message interface data A1 registers
Table 780. CAN message interface data A2 registers
Table 781. CAN message interface data A2 registers
Table 782. CAN message interface data B1 registers
Table 783. CAN message interface data B1 registers
Table 784. CAN message interface data B2 registers
Table 785. CAN message interface data B2 registers
Table 786. CAN transmission request 1 register (TXREQ1,
Table 787. CAN transmission request 2 register (TXREQ2,
Table 788. CAN new data 1 register (ND1, address
Table 789. CAN new data 2 register (ND2, address
Table 790. CAN interrupt pending 1 register (IR1, address
Table 791. CAN interrupt pending 2 register (IR2, addresses
Table 792. CAN message valid 1 register (MSGV1,
Table 793. CAN message valid 2 register (MSGV2, address
(C_CAN0) and 0x400A 4094 (C_CAN1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 828
registers (IF1_MCTRL, address 0x400E 2038
(C_CAN0) and 0x400A 4038 (C_CAN1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . 829
registers (IF2_MCTRL, address 0x400E 2098
(C_CAN0) and 0x400A 4098 (C_CAN1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . 831
(IF1_DA1, address 0x400E 203C (C_CAN0) and
0x400A 403C (C_CAN1)) bit description . . . . 832
(IF2_DA1, address 0x400E 209C (C_CAN0) and
0x400A 409C (C_CAN1)) bit description . . . . 833
(IF1_DA2, address 0x400E 2040 (C_CAN0) and
0x400A 4040 (C_CAN1)) bit description . . . . 833
(IF2_DA2, address 0x400E 20A0 (C_CAN0) and
0x400A 40A0 (C_CAN1)) bit description . . . . 833
(IF1_DB1, address 0x400E 2044 (C_CAN0) and
0x400A 4044 (C_CAN1)) bit description . . . . 833
(IF2_DB1, address 0x400E 20A4 (C_CAN0) and
0x400A 40A4 (C_CAN1)) bit description . . . . 833
(IF1_DB2, address 0x400E 2048 (C_CAN0) and
0x400A 4048 (C_CAN1)) bit description . . . . 833
(IF2_DB2, address 0x400E 20A8 (C_CAN0) and
0x400A 40A8 (C_CAN1)) bit description . . . . 834
address 0x400E 2100 (C_CAN0) and 0x400A
4100 (C_CAN1)) bit description . . . . . . . . . . . 834
address 0x400E 2104 (C_CAN0) and 0x400A
4104 (C_CAN1)) bit description . . . . . . . . . . . 834
0x400E 2120 (C_CAN0) and 0x400A 4120
(C_CAN1)) bit description . . . . . . . . . . . . . . . 835
0x400E 2124 (C_CAN0) and 0x400A 4124
(C_CAN1)) bit description . . . . . . . . . . . . . . . 835
0x400E 2140 (C_CAN0) and 0x400A 4140
(C_CAN1)) bit description . . . . . . . . . . . . . . . 836
0x400E 2144 (C_CAN0) and 0x400A 4144
(C_CAN1)) bit description . . . . . . . . . . . . . . . 836
addresses 0x400E 2160 (C_CAN0) and 0x400A
4160 (C_CAN1)) bit description . . . . . . . . . . . 836
0x400E 2164 (C_CAN0) and 0x400A 4164
(C_CAN1)) bit description . . . . . . . . . . . . . . . 837
Chapter 43: Supplementary information
UM10430
© NXP B.V. 2011. All rights reserved.
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