LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 298

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
18.6 Register description
<Document ID>
User manual
<tbd>
Table 224. Register overview: SDMMC (base address: 0x4000 4000)
Name
CTRL
PWREN
CLKDIV
CLKSRC
CLKENA
TMOUT
CTYPE
BLKSIZ
BYTCNT
INTMASK
CMDARG
CMD
RESP0
RESP1
RESP2
RESP3
MINTSTS
RINTSTS
STATUS
FIFOTH
CDETECT
WRTPRT
GPIO
TCBCNT
TBBCNT
DEBNCE
USRID
VERID
UHS_REG
RST_N
BMOD
PLDMND
DBADDR
IDSTS
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
r
R/W
R
R/W
R
R
R/W
R
R
R/W
R/W
R
R/W
R/W
R/W
W
R/W
R/W
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Address
offset
0x000
0x004
0x008
0x00C
0x010
0x014
0x018
0x01C
0x020
0x024
0x028
0x02C
0x030
0x034
0x038
0x03C
0x040
0x044
0x048
0x04C
0x050
0x054
0x058
0x05C
0x060
0x064
0x068
0x06C
0x074
0x078
0x080
0x084
0x088
0x08C
Description
Control Register
Power Enable Register
Clock Divider Register
SD Clock Source Register
Clock Enable Register
Time-out Register
Card Type Register
Block Size Register
Byte Count Register
Interrupt Mask Register
Command Argument Register
Command Register
Response Register 0
Response Register 1
Response Register 2
Response Register 3
Masked Interrupt Status Register
Raw Interrupt Status Register
Status Register
FIFO Threshold Watermark Register
Card Detect Register
Write Protect Register
General Purpose Input/Output Register
Transferred CIU Card Byte Count
Register
Transferred Host to BIU-FIFO Byte
Count Register
Debounce Count Register
User ID Register
Version ID Register
UHS-1 Register
Hardware Reset
Bus Mode Register
Poll Demand Register
Descriptor List Base Address Register
Internal DMAC Status Register
Chapter 18: LPC18xx SD/MMC interface
UM10430
© NXP B.V. 2011. All rights reserved.
Reset value
0x00000000
0x00000000
0x00000000
0x00000000
0
0
Reset value
0
0x00000000
0
0x5342230a
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
298 of 1164