LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 272

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
16.6.10 DMA Software Single Request Register
16.6.11 DMA Software Last Burst Request Register
Table 205. DMA Software Burst Request Register (SOFTBREQ, address 0x4000 2020) bit
Note: It is recommended that software and hardware peripheral requests are not used at
the same time.
The SOFTSREQ Register is read/write and enables DMA single transfer requests to be
generated by software. A DMA request can be generated for each source by writing a 1 to
the corresponding register bit. A register bit is cleared when the transaction has
completed. Reading the register indicates which sources are requesting single DMA
transfers. A request can be generated from either a peripheral or the software request
register.
Table 206. DMA Software Single Request Register (SOFTSREQ, address 0x4000 2024) bit
The SOFTLBREQ Register is read/write and enables DMA last burst requests to be
generated by software. A DMA request can be generated for each source by writing a 1 to
the corresponding register bit. A register bit is cleared when the transaction has
completed. Reading the register indicates which sources are requesting last burst DMA
transfers. A request can be generated from either a peripheral or the software request
register.
Bit
15:0
31:16
Bit
15:0
31:16 -
Symbol
SOFTSREQ Software single transfer request flags for each of 16
Symbol
SOFTBREQ Software burst request flags for each of 16 possible
-
description
description
All information provided in this document is subject to legal disclaimers.
Description
possible sources. Each bit represents one DMA request
line or peripheral function:
0 - writing 0 has no effect.
1 - writing 1 generates a DMA single transfer request for
the corresponding request line.
Reserved. Read undefined. Write reserved bits as zero.
Chapter 16: LPC18xx General Purpose DMA (GPDMA) controller
Description
sources. Each bit represents one DMA request line or
peripheral function (refer to
hardware connections to the DMA controller):
0 - writing 0 has no effect.
1 - writing 1 generates a DMA burst request for the
corresponding request line.
Reserved. Read undefined. Write reserved bits as zero.
Rev. 00.13 — 20 July 2011
Table 195
for peripheral
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0x00
-
Reset
value
0x00
-
272 of 1164
Access
R/W
-
Access
R/W
-