LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 882

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 822. Slave Receiver mode
<Document ID>
User manual
Status
Code
(STAT)
0x98
0xA0
Status of the I
and hardware
Previously addressed
with General Call;
DATA byte has been
received; NOT ACK
has been returned.
A STOP condition or
Repeated START
condition has been
received while still
addressed as
SLV/REC or
SLV/TRX.
2
C-bus
…continued
Application software response
To/From DAT
Read data byte or 0
Read data byte or 0
Read data byte or 1
Read data byte
No STDAT action
or
No STDAT action
or
No STDAT action
or
No STDAT action
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
To CON
STA STO SI
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
0
1
0
1
0
1
0
1
Chapter 37: LPC18xx I2C-bus interface
Next action taken by I
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
ADR[0] = logic 1.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address. A START condition will be
transmitted when the bus becomes free.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
ADR[0] = logic 1. A START condition will
be transmitted when the bus becomes
free.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
ADR[0] = logic 1.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address. A START condition will be
transmitted when the bus becomes free.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
ADR[0] = logic 1. A START condition will
be transmitted when the bus becomes
free.
UM10430
© NXP B.V. 2011. All rights reserved.
2
C hardware
882 of 1164